The present invention is directed to integrated circuits. More particularly, the invention provides systems and methods for constant voltage mode and constant current mode. Merely by way of example, the invention has been applied to a flyback power converter with primary-side sensing and regulation. But it would be recognized that the invention has a much broader range of applicability.
Flyback power converters have been used extensively for their simple structures and low costs in low power applications. But in traditional flyback converters, the output voltage regulation often is performed with secondary-side feedback, using an isolated arrangement of TL431 and an opto-coupler. In addition to increasing the system cost, the voltage drop due to the cable loss usually is difficult to compensate.
FIG. 1 is a simplified conventional diagram for a switch-mode flyback power conversion system with secondary-side control. As shown in FIG. 1, a PWM controller 110 is used to control and drive a power MOSFET M1. The power MOSFET M1 is turned on and off to control the power delivered to the load on the secondary side. Consequently, the constant output voltage (CV) mode and the constant output current (CC) mode may be achieved by the secondary-side regulation.
FIG. 2 is a simplified conventional diagram showing characteristics of output voltage and output current of a flyback power conversion system. As shown in FIG. 2, if the output current Io is in the range of from zero to Imax, the system operates in the constant voltage (CV) mode. In the CV mode, the output voltage Vo is, for example, equal to Vmax. Alternatively, if the output voltage is below Vmax, the system may operate in the constant current (CC) mode. In the CC mode, the output current Io is, for example, equal to Imax. In another example, if the output terminal of the system is connected to a discharged battery, the system operates in the CC mode.
To reduce cost and size of the switch-mode flyback power converter and to also improve its efficiency, the power converter with primary-side regulation has become more and more popular. With the primary-side regulation, the output voltage is sensed by detecting the voltage of an auxiliary winding that is tightly coupled to the secondary winding. Since the voltage of the auxiliary winding images the output voltage that is associated with the secondary winding, the voltage sensed in the auxiliary winding can be utilized to regulate the secondary-side output voltage. The expensive parts of TL431 and opto-coupler usually are not needed, so the cost and size can be reduced. Additionally, using sensed information of the output voltage, the output current can be regulated based on internal computation of the controller. Therefore the sensing resistor for output current often is not needed, so the overall conversion efficiency can be improved.
FIG. 3 is a simplified conventional diagram for a switch-mode flyback power conversion system with primary-side sensing and regulation. FIG. 4 is another simplified conventional diagram for a switch-mode flyback power conversion system with primary-side sensing and regulation.
As shown, the output voltage Vout is mapped to the DC voltage VINV at the node INV, and is therefore regulated through the regulation of VINV. With primary-side regulation, the relationship of VINV and Vout can be expressed as:
                              V          INV                =                                                            n                ×                                  R                  2                                                                              R                  1                                +                                  R                  2                                                      ×                          (                                                V                  out                                +                                  V                                      D                    ⁢                                                                                  ⁢                    2                                                              )                                -                                                    R                2                                                              R                  1                                +                                  R                  2                                                      ×                          V                              D                ⁢                                                                  ⁢                1                                                                        (        1        )                            where n is the ratio of auxiliary-winding turns to secondary-winding turns. Additionally, VD1 and VD2 are the forward diode drop voltages.        
Setting
      k    =                            R          1                +                  R          2                            n        ×                  R          2                      ,Vout is therefore given by:
                              V          out                =                              k            ×                          V              INV                                +                                    1              n                        ⁢                          V                              D                ⁢                                                                  ⁢                1                                              -                      V                          D              ⁢                                                          ⁢              2                                                          (        2        )            
The output voltage is regulated through the regulation of the voltage for the auxiliary winding. For example, the sensed voltage, VINV, is compared with a predetermined voltage level, VREF. The difference between VINV and VREF is associated with an error signal, which is amplified by an error amplifier. Based at least in part on the amplified error signal, a PWM/PFM signal is generated.
The PWM/PFM signal controls turning on/off of a power switch and thus controls the power delivered to the secondary side. As a result, the difference between VINV and VREF becomes smaller and smaller, and eventually VINV becomes equal to VREF. Since VINV is the image of the output voltage Vout, the output voltage Vout can be linearly dependent on VINV and thus VREF, if certain conditions are satisfied.
Specifically, as shown below, the output voltage Vout linearly depends on VREF if the forward voltage across diodes D1 and D2 are constant.
                              V          out                =                              k            ×                          V              REF                                +                                    1              n                        ⁢                          V                              D                ⁢                                                                  ⁢                1                                              -                      V                          D              ⁢                                                          ⁢              2                                                          (        3        )            
But the forward voltage of a diode often depends on the current that flows through the diode. Hence the forward voltage of D2 changes if the load current changes. The forward voltage of D1 is almost constant since the current flowing through D1 does not change even if the output load current changes.
FIG. 5 is yet another simplified conventional diagram for a switch-mode flyback power conversion system with primary-side sensing and regulation. The power conversion system 2000 includes a primary winding 2010, a secondary winding 2012, an auxiliary winding 2014, a power switch 2020, a current sensing resistor 2030, an equivalent resistor 2040 for an output cable, resistors 2050 and 2052, and rectifying diodes 2060 and 2062. For example, the power switch 2020 is an NPN bipolar transistor. In another example, the power switch 2020 is a MOSFET transistor. In yet another example, the power switch 2020 is an IGBT transistor.
As shown in FIG. 5, to regulate the output voltage within a predetermined range, information related to the output voltage and the output loading often needs to be extracted. In the discontinuous conduction mode (DCM), such information can be extracted through the auxiliary winding 2014. When the power switch 2020 is turned on, the energy is stored in the secondary winding 2012. Then, when the power switch 2020 is turned off, the stored energy is released to the output terminal, and the voltage of the auxiliary winding 2014 maps the output voltage on the secondary side as shown below.
                              V          FB                =                                            1              k                        ×                          (                                                V                  o                                +                                  V                                      D                    ⁢                                                                                  ⁢                    2                                                  +                                                      I                    o                                    ×                                      R                    eq                                                              )                                -                                    V                              D                ⁢                                                                  ⁢                1                                                    k              ×              n                                                          (        4        )                            where VFB represents a voltage at a node 2054. R1 and R2 represent the resistance values of the resistors 2050 and 2052 respectively. Additionally, n represents a turns ratio between the auxiliary winding 2014 and the secondary winding 2012. Specifically, n is equal to the number of turns of the auxiliary winding 2014 divided by the number of turns of the secondary winding 2012. Vo and Io represent the output voltage and the output current respectively. Moreover, VD1 represents the forward voltage of the rectifying diode 2062, and VD2 represents the forward voltage of the rectifying diode 2060 respectively. Also, Req represents the resistance value of the equivalent resistor 2040, and k represents a feedback coefficient equal to        
                    R        1            +              R        2                    n      ×              R        2              .
FIG. 6 is a simplified diagram showing a conventional operation mechanism for the flyback power conversion system 2000. As shown in FIG. 6, the controller chip of the conversion system 2000 uses a sample-and-hold mechanism. When the demagnetization process on the secondary side is almost completed and the current Isec of the secondary winding 2012 almost becomes zero, the voltage VFB at the node 2054 (which is proportional to Vaux of the auxiliary winding 2012) is sampled at, for example, point A of FIG. 6. The sampled voltage value is usually held until the next voltage sampling is performed. Through a negative feedback loop, the sampled voltage value can become equal to a reference voltage VREF. Therefore,VFB=VREF  (5)
Combining Equations 4 and 5, the following can be obtained:
                              V          o                =                              k            ×                          V              REF                                +                                    1              n                        ⁢                          V                              D                ⁢                                                                  ⁢                1                                              -                      V                          D              ⁢                                                          ⁢              2                                -                                    I              o                        ×                          R              eq                                                          (        6        )            
Based on Equation 6, the output voltage decreases with the increasing output current. Additionally, the control scheme as described above often has poor regulation for output voltage due to the change in the forward voltage of the diode D2.
Furthermore, if the power conversion system 2000 operates in the discontinuous conduction mode (DCM), the output current can also be regulated in order to achieve a constant output current. As shown in FIG. 6, the output current is equal to the average value of the current Isec of the secondary winding 2012 in each switching cycle as shown below:
                              I          o                =                              1            2                    ×                      I                          sec              ⁢              _              ⁢              pk                                ×                                    T              Demag                                      T              s                                                          (        7        )                                Therefore        ,                              I            o                    =                                    1              2                        ×            N            ×                          1              T                        ×                                          ∫                0                T                            ⁢                                                                    V                                          cs                      ⁢                      _                      ⁢                      pek                                                                            R                    s                                                  ×                                                      T                    Demag                                                        T                    s                                                  ⁢                                                                  ⁢                                  ⅆ                  t                                                                                        (        8        )                            where N represents a turns ratio between the primary winding 2010 and the secondary winding 2012. Specifically, N is equal to the number of turns of the primary winding 2010 divided by the number of turns of the secondary winding 2012. Additionally, T represents an integration period, and Ts represents a switching period that is equal to the inverse of the switching frequency of the power conversion system 2000. For example, T is equal to or larger than Ts. Moreover, Rs represents the resistance value of the current sensing resistor 2030. Also, Vcs_pk represents the peak value of the sensed voltage Vcs by the current sensing resistor 2030 within each switching cycle, and TDemag represents duration of the demagnetization process within each switching cycle. According to some conventional technology, the output current may depend on the inductance of the primary winding; therefore the output current often suffers from large variations, which usually cannot be effectively compensated in mass production.        
Hence it is highly desirable to improve techniques for output voltage regulation and output current control, such as primary-winding inductance compensation, is highly desirable.